Finite state machine for debounced button press detection with five states: IDLE, COUNT1, COUNT2, LONG, and asynchronous RESET. The FSM transitions through counting states as the button remains pressed, distinguishing between short presses (COUNT1/COUNT2) and long presses (LONG ≥3 cycles). RESET forces immediate return to IDLE from any state, enabling responsive interrupt handling. This pattern eliminates switch bounce noise and provides clean output symbols for downstream logic. Fork this diagram on Diagrams.so to customize state names, timing thresholds, or output signal definitions for your specific application. The double-circle initial state notation and dashed RESET transitions follow standard FSM conventions for clarity in hardware design documentation.